Microsoft and TSMC announce Joint Innovation Lab to accelerate silicon design on Azure

%3CLINGO-SUB%20id%3D%22lingo-sub-1650675%22%20slang%3D%22en-US%22%3EMicrosoft%20and%20TSMC%20announce%20Joint%20Innovation%20Lab%20to%20accelerate%20silicon%20design%20on%20Azure%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1650675%22%20slang%3D%22en-US%22%3E%3CP%3ERight%20now%2C%20every%20industry%20and%20every%20customer%20is%20going%20through%20a%20massive%20transformation%2C%20and%20cloud%20computing%20is%20often%20a%20central%20enabler%20of%20this.%20The%20silicon%20industry%20is%20also%20experiencing%20change%20as%20a%20critical%20part%20of%20the%20fast-growing%20cloud%20computing%20ecosystem%E2%80%94an%20ecosystem%20where%20silicon%20and%20chip%20design%20workloads%20must%20meet%20the%20rising%20bar%20for%20performance%2C%20complexity%2C%20and%20perceived%20costs.%20In%20Azure%2C%20we%20focus%20on%20the%20needs%20of%20the%20semiconductor%20design%20industry%2C%20so%20we%20can%20solve%20problems%20and%20provide%20solutions%20for%20our%20customers.%20With%20our%20partners%20at%20TSMC%2C%20we%20share%20the%20belief%20that%20using%20the%20cloud%20for%20silicon%20design%20will%20be%20a%20competitive%20advantage%20for%20those%20that%20embrace%20it.%3C%2FP%3E%0A%3CP%3E%26nbsp%3B%3C%2FP%3E%0A%3CP%20class%3D%22%22%3EThrough%20our%20deep%20partnership%2C%20we%20have%20worked%20closely%20to%20implement%20an%20Azure-based%20architecture%20for%20TSMC%E2%80%99s%20Virtual%20Design%20Environment%2C%20refined%20cloud%20resource%20selection%20and%20storage%20architectures%20for%20specific%20workloads%2C%20and%20demonstrated%20cost%20versus%20performance%20optimizations%20for%20scalable%20workloads.%20This%20requires%20both%20new%20virtual%20machine%20(VM)%20types%20most%20suitable%20for%20EDA%20(Electronics%20Design%20Automation)%20workloads%2C%20and%20a%20cloud-optimized%20design%20solution%20that%20fully%20utilizes%20EDA%20parallelism.%20Starting%20from%20our%20collaboration%20with%20TSMC%20and%20its%20EDA%20ecosystem%20partners%2C%20we%20have%20jointly%20achieved%20multiple%20breakthroughs%20in%20both%20areas.%3C%2FP%3E%0A%3CP%20class%3D%22%22%3E%26nbsp%3B%3C%2FP%3E%0A%3CP%20class%3D%22%22%3E%3CA%20href%3D%22https%3A%2F%2Fazure.microsoft.com%2Fen-us%2Fblog%2Fmicrosoft-and-tsmc-announce-joint-innovation-lab-to-accelerate-silicon-design-on-azure%2F%22%20target%3D%22_self%22%20rel%3D%22noopener%20noreferrer%20noopener%20noreferrer%22%3ERead%20the%20full%20article.%3C%2FA%3E%3C%2FP%3E%3C%2FLINGO-BODY%3E
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Microsoft

Right now, every industry and every customer is going through a massive transformation, and cloud computing is often a central enabler of this. The silicon industry is also experiencing change as a critical part of the fast-growing cloud computing ecosystem—an ecosystem where silicon and chip design workloads must meet the rising bar for performance, complexity, and perceived costs. In Azure, we focus on the needs of the semiconductor design industry, so we can solve problems and provide solutions for our customers. With our partners at TSMC, we share the belief that using the cloud for silicon design will be a competitive advantage for those that embrace it.

 

Through our deep partnership, we have worked closely to implement an Azure-based architecture for TSMC’s Virtual Design Environment, refined cloud resource selection and storage architectures for specific workloads, and demonstrated cost versus performance optimizations for scalable workloads. This requires both new virtual machine (VM) types most suitable for EDA (Electronics Design Automation) workloads, and a cloud-optimized design solution that fully utilizes EDA parallelism. Starting from our collaboration with TSMC and its EDA ecosystem partners, we have jointly achieved multiple breakthroughs in both areas.

 

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